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ISLPED
2003
ACM
90views Hardware» more  ISLPED 2003»
10 years 9 months ago
Low cost instruction cache designs for tag comparison elimination
Tag comparison elimination (TCE) is an effective approach to reduce I-cache energy. Current research focuses on finding good tradeoffs between hardware cost and percentage of comp...
Youtao Zhang, Jun Yang 0002
ISLPED
2003
ACM
94views Hardware» more  ISLPED 2003»
10 years 9 months ago
A 0.75-mW analog processor IC for wireless biosignal monitor
This work presents a single-channel analog processor IC for the wireless biosignal monitor. This chip occupies a small die area of 0.52 mm2 and has a low power consumption of 0.75...
Chih-Jen Yen, Mely Chen Chi, Wen-Yaw Chung, Shing-...
ISLPED
2003
ACM
127views Hardware» more  ISLPED 2003»
10 years 9 months ago
Lightweight set buffer: low power data cache for multimedia application
A new architectural technique to reduce power dissipation in data caches is proposed. In multimedia applications, a major portion of data cache accesses hit in the same cache set ...
Jun Yang 0002, Youtao Zhang
ISLPED
2003
ACM
152views Hardware» more  ISLPED 2003»
10 years 9 months ago
An MTCMOS design methodology and its application to mobile computing
The Multi-Threshold CMOS (MTCMOS) technology provides a solution to the high performance and low power design requirements of modern designs. While the low Vth transistors are use...
Hyo-Sig Won, Kyo-Sun Kim, Kwang-Ok Jeong, Ki-Tae P...
ISLPED
2003
ACM
102views Hardware» more  ISLPED 2003»
10 years 9 months ago
Energy-aware architectures for a real-valued FFT implementation
Alice Wang, Anantha Chandrakasan
ISLPED
2003
ACM
86views Hardware» more  ISLPED 2003»
10 years 9 months ago
Exploiting compiler-generated schedules for energy savings in high-performance processors
This paper develops a technique that uniquely combines the advantages of static scheduling and dynamic scheduling to reduce the energy consumed in modern superscalar processors wi...
Madhavi Gopal Valluri, Lizy Kurian John, Heather H...
ISLPED
2003
ACM
129views Hardware» more  ISLPED 2003»
10 years 9 months ago
A critical analysis of application-adaptive multiple clock processors
Enabled by the continuous advancement in fabrication technology, present day synchronous microprocessors include more than 100 million transistors and have clock speeds well in ex...
Emil Talpes, Diana Marculescu
ISLPED
2003
ACM
95views Hardware» more  ISLPED 2003»
10 years 9 months ago
Power-aware scheduling of conditional task graphs in real-time multiprocessor systems
We propose a novel power-aware task scheduling algorithm for DVS-enabled real-time multiprocessor systems. Unlike the existing algorithms, the proposed DVS algorithm can handle co...
Dongkun Shin, Jihong Kim
ISLPED
2003
ACM
122views Hardware» more  ISLPED 2003»
10 years 9 months ago
A mixed-clock issue queue design for globally asynchronous, locally synchronous processor cores
Ever shrinking device sizes and innovative micro-architectural and circuit design techniques have made it possible to have multi-million transistor systems running at multi-gigahe...
Venkata Syam P. Rapaka, Diana Marculescu
ISLPED
2003
ACM
122views Hardware» more  ISLPED 2003»
10 years 9 months ago
Analysis of discharge techniques for multiple battery systems
Ravishankar Rao, Sarma B. K. Vrudhula, Daler N. Ra...
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