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ISLPED
2005
ACM
90views Hardware» more  ISLPED 2005»
9 years 3 months ago
Driver pre-emphasis techniques for on-chip global buses
By using current-sensing differential buses with driver preemphasis techniques, power dissipation is reduced by 26.0%
Liang Zhang, John Wilson, Rizwan Bashirullah, Lei ...
ISLPED
2005
ACM
100views Hardware» more  ISLPED 2005»
9 years 3 months ago
Joint exploration of architectural and physical design spaces with thermal consideration
Heat is a main concern for processors in deep sub-micron technologies. The chip temperature is affected by both the power consumption of processor components and the chip layout....
Yen-Wei Wu, Chia-Lin Yang, Ping-Hung Yuh, Yao-Wen ...
ISLPED
2005
ACM
96views Hardware» more  ISLPED 2005»
9 years 3 months ago
A low-power, multichannel gated oscillator-based CDR for short-haul applications
A gated current-controlled oscillator (GCCO) based topology is used to implement a low-power multi-channel clock and data recovery (CDR) system in a 0.18um digital CMOS technology...
Armin Tajalli, Paul Muller, Seyed Mojtaba Atarodi,...
ISLPED
2005
ACM
100views Hardware» more  ISLPED 2005»
9 years 3 months ago
A tunable bus encoder for off-chip data buses
Off-Chip buses constitute a significant portion of the total system power in embedded systems. Past research has focused on encoding contiguous bit positions in data values to red...
Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Wa...
ISLPED
2005
ACM
103views Hardware» more  ISLPED 2005»
9 years 3 months ago
A technique for low energy mapping and routing in network-on-chip architectures
Network-on-chip (NoC) has been proposed as a solution for the global communication challenges of System-on-chip (SoC) design in the nanoscale technologies. NoC design with mesh ba...
Krishnan Srinivasan, Karam S. Chatha
ISLPED
2005
ACM
99views Hardware» more  ISLPED 2005»
9 years 3 months ago
A low-power bus design using joint repeater insertion and coding
In this paper, we propose joint repeater insertion and crosstalk avoidance coding as a low-power alternative to repeater insertion for global bus design in nanometer technologies....
Srinivasa R. Sridhara, Naresh R. Shanbhag
ISLPED
2005
ACM
93views Hardware» more  ISLPED 2005»
9 years 3 months ago
Power-aware code scheduling for clusters of active disks
In this paper, we take the idea of application-level processing on disks to one level further, and focus on an architecture, called Cluster of Active Disks (CAD), where the storag...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir
ISLPED
2005
ACM
99views Hardware» more  ISLPED 2005»
9 years 3 months ago
Self-timed circuits for energy harvesting AC power supplies
The recent explosion in capability of embedded and portable electronics has not been matched by battery technology. The slow growth of battery energy density has limited device li...
Jeff Siebert, Jamie Collier, Rajeevan Amirtharajah
ISLPED
2005
ACM
150views Hardware» more  ISLPED 2005»
9 years 3 months ago
Instruction packing: reducing power and delay of the dynamic scheduling logic
The instruction scheduling logic used in modern superscalar microprocessors often relies on associative searching of the issue queue entries to dynamically wakeup instructions for...
Joseph J. Sharkey, Dmitry V. Ponomarev, Kanad Ghos...
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