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    ISMVL
    1999
    IEEE
    65views Hardware» more  ISMVL 1999»
    Bi-Decompositions of Multi-Valued Functions for Circuit Design and Data Mining Applications
    13 years 9 months ago
    Bi-Decompositions of Multi-Valued Functions for Circuit Design and Data Mining Applications
    Download  web.cecs.pdx.edu
    Bernd Steinbach, Marek A. Perkowski, Christian Lan...
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    ISMVL
    1999
    IEEE
    113views Hardware» more  ISMVL 1999»
    Supplementary Symmetrical Logic Circuit Structure
    13 years 9 months ago
    Supplementary Symmetrical Logic Circuit Structure
    Download  www.omnibaselogic.com
    Edgar "Dan" Olson
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    ISMVL
    1999
    IEEE
    72views Hardware» more  ISMVL 1999»
    Information Relationships and Measures in Application to Logic Design
    13 years 9 months ago
    Information Relationships and Measures in Application to Logic Design
    Download  web.cecs.pdx.edu
    In this paper, the theory of information relationships and relationship measures is considered and its application to logic design is discussed. This theory makes operational the ...
    Lech Józwiak
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    ISMVL
    1999
    IEEE
    133views Hardware» more  ISMVL 1999»
    Ternary Multiplication Circuits Using 4-Input Adder Cells and Carry Look-Ahead
    13 years 9 months ago
    Ternary Multiplication Circuits Using 4-Input Adder Cells and Carry Look-Ahead
    Download  www.ee.bgu.ac.il
    We introduce a new implementation of a ternary adder with four inputs and two outputs. This ternary adder reduces the number of digits in a multiplication compared with a binary m...
    Andreas Herrfeld, Siegbert Hentschke
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    ISMVL
    1999
    IEEE
    76views Hardware» more  ISMVL 1999»
    Multiple-Valued Minimization to Optimize PLAs with Output EXOR Gates
    13 years 9 months ago
    Multiple-Valued Minimization to Optimize PLAs with Output EXOR Gates
    Download  www.lsi-cad.com
    This paper considers an optimization method of programmable logic arrays (PLAs), which have two-input EXOR gate at the outputs. The PLA realizes an EXOR of two sum-of-products exp...
    Debatosh Debnath, Tsutomu Sasao
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    ISMVL
    1999
    IEEE
    90views Hardware» more  ISMVL 1999»
    Transformations between Signed and Classical Clause Logic
    13 years 9 months ago
    Transformations between Signed and Classical Clause Logic
    Download  www.uni-koblenz.de
    In the last years two automated reasoning techniques for clause normal form arose in which the use of labels are prominently featured: signed logic and annotated logic programming...
    Bernhard Beckert, Reiner Hähnle, Felip Many&a...
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    ISMVL
    1999
    IEEE
    93views Hardware» more  ISMVL 1999»
    Synthesis of Multiple-Valued Decision Diagrams using Current-Mode CMOS Circuits
    13 years 9 months ago
    Synthesis of Multiple-Valued Decision Diagrams using Current-Mode CMOS Circuits
    Download  isi.kfupm.edu.sa
    Mostafa H. Abd-El-Barr, Henry Fernandes
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