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ISPASS
2006
IEEE
9 years 5 months ago
Branch trace compression for snapshot-based simulation
We present a scheme to compress branch trace information for use in snapshot-based microarchitecture simulation. The compressed trace can be used to warm any arbitrary branch pred...
Kenneth C. Barr, Krste Asanovic
ISPASS
2006
IEEE
9 years 5 months ago
ATTILA: a cycle-level execution-driven simulator for modern GPU architectures
The present work presents a cycle-level execution-driven simulator for modern GPU architectures. We discuss the simulation model used for our GPU simulator, based in the concept o...
Victor Moya Del Barrio, Carlos González, Jo...
ISPASS
2006
IEEE
9 years 5 months ago
Characterizing the branch misprediction penalty
Despite years of study, branch mispredictions remain as a significant performance impediment in pipelined superscalar processors. In general, the branch misprediction penalty can...
Stijn Eyerman, James E. Smith, Lieven Eeckhout
ISPASS
2006
IEEE
9 years 5 months ago
Improved stride prefetching using extrinsic stream characteristics
Stride-based prefetching mechanisms exploit regular streams of memory accesses to hide memory latency. While these mechanisms are effective, they can be improved by studying the p...
Hassan Al-Sukhni, James Holt, Daniel A. Connors
ISPASS
2006
IEEE
9 years 5 months ago
Accelerating architectural exploration using canonical instruction segments
Detailed microarchitectural simulators are not well suited for exploring large design spaces due to their excessive simulation times. We introduce AXCIS, a framework for fast and ...
Rose F. Liu, Krste Asanovic
ISPASS
2006
IEEE
9 years 5 months ago
Workload sanitation for performance evaluation
The performance of computer systems depends, among other things, on the workload. Performance evaluations are therefore often done using logs of workloads on current productions s...
Dror G. Feitelson, Dan Tsafrir
ISPASS
2006
IEEE
9 years 5 months ago
A statistical multiprocessor cache model
Erik Berg, Håkan Zeffer, Erik Hagersten
ISPASS
2006
IEEE
9 years 5 months ago
Compiler-based adaptive fetch throttling for energy-efficiency
Huaping Wang, Yao Guo, Israel Koren, C. Mani Krish...
ISPASS
2006
IEEE
9 years 5 months ago
Considering all starting points for simultaneous multithreading simulation
Commercial processors have support for Simultaneous Multithreading (SMT), yet little work has been done to provide representative simulation results for SMT. Given a workload, cur...
Michael Van Biesbrouck, Lieven Eeckhout, Brad Cald...
ISPASS
2006
IEEE
9 years 5 months ago
Simulation sampling with live-points
Current simulation-sampling techniques construct accurate model state for each measurement by continuously warming large microarchitectural structures (e.g., caches and the branch...
Thomas F. Wenisch, Roland E. Wunderlich, Babak Fal...
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