ISSS
1995
IEEE
13 years 8 months ago
1995
IEEE
We present an integrated approach aimed at predicting layout area needed to implement a behavioral description for a given performance goal. Our approach is novel because: (1) it ...
ISSS
1995
IEEE
13 years 8 months ago
1995
IEEE
The increasing usage of Application Specific Instruction Set Processors (ASIPs) in audio and video telecommunications has made strong demands on the rapid availability of dedicat...
ISSS
1995
IEEE
13 years 8 months ago
1995
IEEE
This paper describes the application of a measurement based power analysis technique for an embedded DSP processor. An instruction-level power model for the processor has been dev...
ISSS
1995
IEEE
13 years 8 months ago
1995
IEEE
ISSS
1995
IEEE
13 years 8 months ago
1995
IEEE
{DSP algorithms in most cases are subject to hard real-time constraints. In case of programmable DSP processors, meeting those constraints must be ensured by appropriate code gener...
ISSS
1995
IEEE
13 years 8 months ago
1995
IEEE
In this paper we brie
y describe a set of designs that can serve as examples for High Level Synthesis (HLS) systems. The designs vary in complexity from simple behavioral nite st...
ISSS
1995
IEEE
13 years 8 months ago
1995
IEEE
One of the key issues in hardware/software{cosynthesis is precise estimation. The usual local estimation techniques are inadequate for globally optimising compilers and synthesis ...
ISSS
1995
IEEE
13 years 8 months ago
1995
IEEE
This paper examines the problem of code-generation for expression trees on non-homogeneous register set architectures. It proposes and proves the optimality of an O(n) algorithm f...
ISSS
1995
IEEE
13 years 8 months ago
1995
IEEE
ISSS
1995
IEEE
13 years 8 months ago
1995
IEEE
higher levels of abstraction, due to the still increasing design complexities that can be expected in the near future. Behavioral synthesis can play a key role in this prospect, as...