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ISSS
1996
IEEE
114views Hardware» more  ISSS 1996»
9 years 6 months ago
Flow Graph Balancing for Minimizing the Required Memory Bandwidth
In this paper we present the problem of flow graph balancing for minimizingthe required memory bandwidth. Our goal is to minimize the required memory bandwidth within the given cy...
Sven Wuytack, Francky Catthoor, Gjalt G. de Jong, ...
ISSS
1996
IEEE
111views Hardware» more  ISSS 1996»
9 years 6 months ago
A Comparison of Functional and Structural Partitioning
Frank Vahid, Thuy Dm Le, Yu-Chin Hsu
ISSS
1996
IEEE
125views Hardware» more  ISSS 1996»
9 years 6 months ago
Size-Constrained Code Placement for Cache Miss Rate Reduction
In design of an embedded system with a cache, it is important to minimize the cache miss rate to reduce the power consumption as well as to improvethe performance of the system. W...
Hiroyuki Tomiyama, Hiroto Yasuura
ISSS
1996
IEEE
116views Hardware» more  ISSS 1996»
9 years 6 months ago
Eliminating False Loops Caused by Sharing in Control Path
Alan Su 0002, Ta-Yung Liu, Yu-Chin Hsu, Mike Tien-...
ISSS
1996
IEEE
116views Hardware» more  ISSS 1996»
9 years 6 months ago
A Constructive Method for Exploiting Code Motion
In this paper we address a resource
Luiz C. V. dos Santos, Marc J. M. Heijligers, C. A...
ISSS
1996
IEEE
143views Hardware» more  ISSS 1996»
9 years 6 months ago
DSP Processor/Compiler Co-Design: A Quantitative Approach
In the paper the problem of processor/compiler codesign for digital signal processing and embedded SYstems is discussed. The main principle we follow is the top-down approach char...
Vojin Zivojnovic, Stefan Pees, C. Schälger, M...
ISSS
1996
IEEE
123views Hardware» more  ISSS 1996»
9 years 6 months ago
Memory Organization for Improved Data Cache Performance in Embedded Processors
Code generation for embedded processors creates opportunities for several performance optimizations not applicable for traditional compilers. We present techniques for improving d...
Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nico...
ISSS
1996
IEEE
134views Hardware» more  ISSS 1996»
9 years 6 months ago
ADOPT: Efficient Hardware Address Generation in Distributed Memory Architectures
An address generation and optimization environment (ADOPT) for distributed memory architectures, is presented. ADOPT is oriented to minimize the area overhead introduced by the us...
Miguel Miranda, Francky Catthoor, Martin Janssen, ...
ISSS
1996
IEEE
119views Hardware» more  ISSS 1996»
9 years 6 months ago
A Codesign Experiment in Acoustic Echo Cancellation: GMDFa
Laurent Freund, Michel Israël, Fréd&ea...
ISSS
1996
IEEE
102views Hardware» more  ISSS 1996»
9 years 6 months ago
Throughput Optimization in Disk-Based Real-Time Application Specific Systems
Traditionally, application specific computations have been focusing on numerically intensive data manipulation. Modern communications and DSP applications, such as WWW, interactiv...
Stephen Docy, Inki Hong, Miodrag Potkonjak
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