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ISSS
1996
IEEE
87views Hardware» more  ISSS 1996»
13 years 8 months ago
Breakpoints and Breakpoint Detection in Source Level Emulation
In this paper we discuss, what breakpoints in Source Level Emulationa are, how we can work with them and how we have to change the cicuit generated by high level synthesis to do s...
Gernot Koch, Udo Kebschull, Wolfgang Rosenstiel
ISSS
1996
IEEE
94views Hardware» more  ISSS 1996»
13 years 8 months ago
Synthesis of Low-Power Selectively-Clocked Systems from High-Level Specification
Luca Benini, Patrick Vuillod, Claudionor Jos&eacut...
ISSS
1996
IEEE
122views Hardware» more  ISSS 1996»
13 years 8 months ago
Modeling Multicomputer Task Allocation as a Vector Packing Problem
This paper considers the problem of task allocation for embedded, bus
James E. Beck, Daniel P. Siewiorek
ISSS
1996
IEEE
169views Hardware» more  ISSS 1996»
13 years 8 months ago
The Use of a Virtual Instruction Set for the Software Synthesis of HW/SW Embedded Systems
The application range of the embedded computing is going to cover the majority of the market products spanning from consumer electronic, automotive, telecom and process control. F...
Alessandro Balboni, William Fornaciari, M. Vincenz...
ISSS
1996
IEEE
129views Hardware» more  ISSS 1996»
13 years 8 months ago
Hardware/Software Partitioning with Iterative Improvement Heuristics
The paper presents two heuristics for hardware/software partitioning of system level specifications. The main objective is to achieve performance optimization with a limited hardw...
Petru Eles, Zebo Peng, Krzysztof Kuchcinski, Alex ...
ISSS
1996
IEEE
103views Hardware» more  ISSS 1996»
13 years 8 months ago
Instruction Set Design and Optimizations for Address Computation in DSP Architectures
In this paper we investigate the problem of code generation for address computation for DSP processors. This work is divided into four parts. First, we propose a branch instructio...
Guido Araujo, Ashok Sudarsanam, Sharad Malik