ISSS
1997
IEEE
13 years 8 months ago
1997
IEEE
Embedded processor-based systems allow for the tailoring of the on-chip memory architecture based on application-specific requirements. We present an analytical strategy for explo...
ISSS
1997
IEEE
13 years 8 months ago
1997
IEEE
We present an algorithm for synthesising controllers specified in a subset of the interval temporal logic Duration Calculus [13]. The synthesised controllers are given as PLC-Auto...
ISSS
1997
IEEE
13 years 8 months ago
1997
IEEE
ISSS
1997
IEEE
13 years 8 months ago
1997
IEEE
ISSS
1997
IEEE
13 years 8 months ago
1997
IEEE
Partitioning a system among multiple input and output pin I O limited packages is a widely researched and hard to solve problem. We previously described a new approach yielding ...
ISSS
1997
IEEE
13 years 8 months ago
1997
IEEE
In this paper, our memory architecture exploration methodology and CAD techniques for network protocol applications are presented. Prototype tools have been implemented, and appli...
ISSS
1997
IEEE
13 years 8 months ago
1997
IEEE
- An approach for broadband modem FIR filter design optimization is presented. It addresses the minimization of the number of addersubtractors used in the hardware implementation o...
ISSS
1997
IEEE
13 years 8 months ago
1997
IEEE
ISSS
1997
IEEE
13 years 8 months ago
1997
IEEE
This paper presents a novel source-level dynamic analysis methodology and tool for High-Level Synthesis (HLS). It not only for the first time enables HLS to offer source-level de...
ISSS
1997
IEEE
13 years 8 months ago
1997
IEEE
This paper presents a model for simultaneous instruction selection, compaction, and register allocation. An arc mapping model along with logical propositions is used to create an ...