Sciweavers

Share
ISSS
1999
IEEE
87views Hardware» more  ISSS 1999»
10 years 3 months ago
Exploration and Synthesis of Dynamic Data Sets in Telecom Network Applications
We present a new exploration and optimization method to select customized implementations for dynamic data sets, as encountered in telecom network, database and multimedia applica...
Chantal Ykman-Couvreur, J. Lambrecht, Diederik Ver...
ISSS
1999
IEEE
121views Hardware» more  ISSS 1999»
10 years 3 months ago
Event-Driven Power Management of Portable Systems
The policy optimization problem for dynamic power management has received considerable attention in the recent past. We formulate policy optimization as a constrained optimization...
Tajana Simunic, Giovanni De Micheli, Luca Benini
ISSS
1999
IEEE
112views Hardware» more  ISSS 1999»
10 years 3 months ago
Middleware Techniques and Optimizations for Real-Time, Embedded Systems
ended tutorial abstract appeared in the Proceedings of the 12th International Symposium On System Synthesis, IEEE, San Jose, CA, USA November, 11, 1999.
Douglas C. Schmidt
ISSS
1999
IEEE
126views Hardware» more  ISSS 1999»
10 years 3 months ago
Catalyst: A DSIP Design Flow Development in Industry
The Motorola System on Chip Design Technologies (SoCDT) team aims at providing a system design environment for its customers. The Toulouse branch concentrates on design efforts in...
W. De Rammelaere, K. Eckert, T. Lawell, R. McGarit...
ISSS
1999
IEEE
94views Hardware» more  ISSS 1999»
10 years 3 months ago
System Synthesis of Synchronous Multimedia Applications
Gang Qu, Malena R. Mesarina, Miodrag Potkonjak
ISSS
1999
IEEE
125views Hardware» more  ISSS 1999»
10 years 3 months ago
Real-Time Task Scheduling for a Variable Voltage Processor
This paper presents a real-time task scheduling technique with a variable voltage processor which can vary its supply voltage dynamically. Using such a processor, running tasks wi...
Takanori Okuma, Tohru Ishihara, Hiroto Yasuura
ISSS
1999
IEEE
149views Hardware» more  ISSS 1999»
10 years 3 months ago
A Buffer Merging Technique for Reducing Memory Requirements of Synchronous Dataflow Specifications
Synchronous Dataflow, a subset of dataflow, has proven to be a good match for specifying DSP programs. Because of the limited amount of memory in embedded DSPs, a key problem duri...
Praveen K. Murthy, Shuvra S. Bhattacharyya
ISSS
1999
IEEE
85views Hardware» more  ISSS 1999»
10 years 3 months ago
Efficient Scheduling of DSP Code on Processors with Distributed Register Files
Code generation methods for digital signal processors are increasingly hampered by the combination of tight timing constraints imposed by the algorithms and the limited capacity o...
Bart Mesman, Carlos A. Alba Pinto, Koen Van Eijk
books