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ISSS
2002
IEEE
133views Hardware» more  ISSS 2002»
9 years 10 months ago
Data Memory Design Considering Effective Bitwidth for Low-Energy Embedded Systems
This paper presents a novel low-energy memory design technique, considering effective bitwidth of variables for applicationspecific systems, called VAbM technique. It targets th...
Hiroto Yasuura, Hiroyuki Tomiyama, Takanori Okuma,...
ISSS
2002
IEEE
141views Hardware» more  ISSS 2002»
9 years 10 months ago
An Accelerated Datapath Width Optimization Scheme for Area Reduction of Embedded Systems
Datapath width optimization is very effective for reducing the area of a custom-made embedded system. The trivial way of optimization is to iteratively customize, evaluate, and r...
Hiroto Yasuura, Yun Cao, Mohammad Mesbah Uddin
ISSS
2002
IEEE
154views Hardware» more  ISSS 2002»
9 years 10 months ago
Optimal Code Size Reduction for Software-Pipelined and Unfolded Loops
Software pipelining and unfolding are commonly used techniques to increase parallelism for DSP applications. However, these techniques expand the code size of the application sign...
Bin Xiao, Zili Shao, Chantana Chantrapornchai, Edw...
ISSS
2002
IEEE
151views Hardware» more  ISSS 2002»
9 years 10 months ago
Tuning of Loop Cache Architectures to Programs in Embedded System Design
Adding a small loop cache to a microprocessor has been shown to reduce average instruction fetch energy for various sets of embedded system applications. With the advent of core-b...
Frank Vahid, Susan Cotterell
ISSS
2002
IEEE
148views Hardware» more  ISSS 2002»
9 years 10 months ago
A Case Study of Hardware and Software Synthesis in ForSyDe
ForSyDe (FORmal SYstem DEsign) is a methodology which addresses the design of SoC applications which may contain control as well as data flow dominated parts. Starting with a for...
Ingo Sander, Axel Jantsch, Zhonghai Lu
ISSS
2002
IEEE
174views Hardware» more  ISSS 2002»
9 years 10 months ago
A Run-Time Word-Level Reconfigurable Coarse-Grain Functional Unit for a VLIW Processor
Nowadays, new DSP applications are offering combined and flexible multimedia and telecom services. VLIW processor architectures, which include dedicated but inflexible functional ...
Carles Rodoreda Sala, Natalino G. Busá
ISSS
2002
IEEE
117views Hardware» more  ISSS 2002»
9 years 10 months ago
CMP on SoC: Architect's View
Shuichi Sakai
ISSS
2002
IEEE
144views Hardware» more  ISSS 2002»
9 years 10 months ago
A Visual Approach to Validating System Level Designs
This paper proposes a simulation-based methodology for validation of a system under design in an early phase of development. The key element of this approach is the visual speci...
Jürgen Ruf, Thomas Kropf, Jochen Klose
ISSS
2002
IEEE
124views Hardware» more  ISSS 2002»
9 years 10 months ago
Timing Analysis of Embedded Software for Speculative Processors
Static timing analysis of embedded software is important for systems with hard real-time constraints. To accurately estimate time bounds, it is essential to model the underlying m...
Abhik Roychoudhury, Xianfeng Li, Tulika Mitra
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