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ITC
2000
IEEE
62views Hardware» more  ITC 2000»
13 years 8 months ago
Power conscious test synthesis and scheduling for BIST RTL data paths
Nicola Nicolici, Bashir M. Al-Hashimi
ITC
2000
IEEE
84views Hardware» more  ITC 2000»
13 years 8 months ago
Non-intrusive BIST for systems-on-a-chip
1 The term "functional BIST" describes a test method to control functional modules so that they generate a deterministic test set, which targets structural faults within ...
Silvia Chiusano, Paolo Prinetto, Hans-Joachim Wund...
ITC
2000
IEEE
124views Hardware» more  ITC 2000»
13 years 9 months ago
Wrapper design for embedded core test
A wrapper is a thin shell around the core, that provides the switching between functional, and core-internal and core-external test modes. Together with a test access mechanism (T...
Yervant Zorian, Erik Jan Marinissen, Maurice Lousb...
ITC
2000
IEEE
108views Hardware» more  ITC 2000»
13 years 9 months ago
Computer-aided fault to defect mapping (CAFDM) for defect diagnosis
Zoran Stanojevic, Hari Balachandran, D. M. H. Walk...
ITC
2000
IEEE
88views Hardware» more  ITC 2000»
13 years 9 months ago
Predicting device performance from pass/fail transient signal analysis data
Transient Signal Analysis (TSA) is a Go/No-Go device testing method that is based on the analysis of voltage transients at multiple test points. In this paper, a technique based o...
James F. Plusquellic, Amy Germida, Jonathan Hudson...
ITC
2000
IEEE
76views Hardware» more  ITC 2000»
13 years 9 months ago
System issues in boundary-scan board test
Boards have evolved into complex systems and even collections of interacting systems. Test engineers struggle to find out how these systems are initialized and booted because of p...
Kenneth P. Parker
ITC
2000
IEEE
101views Hardware» more  ITC 2000»
13 years 9 months ago
Which concurrent error detection scheme to choose ?
Concurrent error detection (CED) techniques (based on hardware duplication, parity codes, etc.) are widely used to enhance system dependability. All CED techniques introduce some ...
Subhasish Mitra, Edward J. McCluskey
ITC
2000
IEEE
123views Hardware» more  ITC 2000»
13 years 9 months ago
Combinational logic synthesis for diversity in duplex systems
We describe logic synthesis techniques for designing diverse implementations of combinational logic circuits in order to maximize the data integrity of diverse duplex systems in t...
Subhasish Mitra, Edward J. McCluskey