Sciweavers

IWSOC
2003
IEEE
104views Hardware» more  IWSOC 2003»
13 years 9 months ago
Incorporating Pattern Prediction Technique for Energy Efficient Filter Cache Design
: - A filter cache is proposed at a higher level than the L1 (main) cache in the memory hierarchy and is much smaller. The typical size of filter cache is of the order of 512 Bytes...
Kugan Vivekanandarajah, Thambipillai Srikanthan, S...
IWSOC
2003
IEEE
99views Hardware» more  IWSOC 2003»
13 years 9 months ago
Template Generation and Selection Algorithms
The availability of high-level design entry tooling is crucial for the viability of any reconfigurable SoC architecture. This paper presents a template generation method to extra...
Yuanqing Guo, Gerard J. M. Smit, Hajo Broersma, Pa...
IWSOC
2003
IEEE
99views Hardware» more  IWSOC 2003»
13 years 9 months ago
A Position Control System Design
A Position Controller is a device used in many applications, such as controlling the movement of an elevator. In this paper, we examine the technological issues surrounding the de...
Robert Gulde, Michael Weeks
IWSOC
2003
IEEE
137views Hardware» more  IWSOC 2003»
13 years 9 months ago
Hardware Partitioning Software for Dynamically Reconfigurable SoC Design
CAD tools support is essential in the success of today digital system design methodologies. Unfortunately, most of the classical design tools do not take into account the possibil...
Philippe Brunet, Camel Tanougast, Yves Berviller, ...
IWSOC
2003
IEEE
132views Hardware» more  IWSOC 2003»
13 years 9 months ago
A Catalog of Hardware Acceleration Techniques for Real-Time Reconfigurable System on Chip
The new technology of reconfigurable System-on-Chip is shown to be a good match to the requirements of realtime embedded systems. In particular, the judicious use of specialised d...
Neil W. Bergmann, Peter Waldeck, John A. Williams
IWSOC
2003
IEEE
117views Hardware» more  IWSOC 2003»
13 years 9 months ago
Design Considerations for Optically Connected Systems on Chip
This paper addresses some fundamental issues relating to the design of systems on chip that utilize optical interconnects. We present an information theoretical model for assessin...
Neal K. Bambha, Shuvra S. Bhattacharyya, Gary Euli...
IWSOC
2003
IEEE
96views Hardware» more  IWSOC 2003»
13 years 9 months ago
Transformations of Signed-Binary Number Representations for Efficient VLSI Arithmetic
Boris D. Andreev, Edward L. Titlebaum, Eby G. Frie...
IWSOC
2003
IEEE
97views Hardware» more  IWSOC 2003»
13 years 9 months ago
Evaluating Template-Based Instruction Compression on Transport Triggered Architectures
In embedded systems, memory is one of the most expensive resources. Due to this, program code size has turned out to be one of the most critical design constraints. Code compressi...
Jari Heikkinen, Tommi Rantanen, Andrea G. M. Cilio...
IWSOC
2003
IEEE
104views Hardware» more  IWSOC 2003»
13 years 9 months ago
IP Watermarking Techniques: Survey and Comparison
— Intellectual property (IP) block reuse is essential for facilitating the design process of System-on-a-Chip. Sharing IP blocks in such a competitive market poses significant h...
Amr T. Abdel-Hamid, Sofiène Tahar, El Mosta...