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JEC
2006
61views more  JEC 2006»
13 years 4 months ago
Time-constrained loop scheduling with minimal resources
Many applications commonly found in digital signal processing and image processing applications can be represented by data-flow graphs (DFGs). In our previous work, we proposed a ...
Timothy W. O'Neil, Edwin Hsing-Mean Sha
JEC
2006
107views more  JEC 2006»
13 years 4 months ago
A dynamically reconfigurable cache for multithreaded processors
Chip multi-processors (CMP) are rapidly emerging as an important design paradigm for both high performance and embedded processors. These machines provide an important performance...
Alex Settle, Dan Connors, Enric Gibert, Antonio Go...