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ICCAD
2009
IEEE
102views Hardware» more  ICCAD 2009»
13 years 2 months ago
Power-switch routing for coarse-grain MTCMOS technologies
Multi-threshold CMOS (MTCMOS) is an effective powergating technique to reduce IC's leakage power consumption by turning off idle devices with MTCMOS switches. However, few ex...
Tsun-Ming Tseng, Mango Chia-Tso Chao, Chien Pang L...
DATE
2010
IEEE
145views Hardware» more  DATE 2010»
13 years 8 months ago
Energy-efficient real-time task scheduling with temperature-dependent leakage
Abstract--Leakage power consumption contributes significantly to the overall power dissipation for systems that are manufactured in advanced deep sub-micron technology. Different f...
Chuan-Yue Yang, Jian-Jia Chen, Lothar Thiele, Tei-...
PATMOS
2004
Springer
13 years 10 months ago
Sleepy Stack Reduction of Leakage Power
Leakage power consumption of current CMOS technology is already a great challenge. ITRS projects that leakage power consumption may come to dominate total chip power consumption as...
Jun-Cheol Park, Vincent John Mooney III, Philipp P...
VLSI
2005
Springer
13 years 10 months ago
Pareto Points in SRAM Design Using the Sleepy Stack Approach
Leakage power consumption of current CMOS technology is already a great challenge. ITRS projects that leakage power consumption may come to dominate total chip power consumption a...
Jun-Cheol Park, Vincent John Mooney III
ISCAS
2007
IEEE
132views Hardware» more  ISCAS 2007»
13 years 10 months ago
High Read Stability and Low Leakage Cache Memory Cell
- Data in conventional six transistor (6T) static random access memory (SRAM) cells are vulnerable to noise due to the direct access to the data storage nodes through the bit lines...
Zhiyu Liu, Volkan Kursun
DATE
2007
IEEE
134views Hardware» more  DATE 2007»
13 years 11 months ago
Accurate temperature-dependent integrated circuit leakage power estimation is easy
— It has been the conventional assumption that, due to the superlinear dependence of leakage power consumption on temperature, and widely varying on-chip temperature profiles, a...
Yongpan Liu, Robert P. Dick, Li Shang, Huazhong Ya...
DATE
2009
IEEE
131views Hardware» more  DATE 2009»
13 years 11 months ago
Process Variation Aware SRAM/Cache for aggressive voltage-frequency scaling
this paper proposes a novel Process Variation Aware SRAM architecture designed to inherently support voltage scaling. The peripheral circuitry of the SRAM is modified to selectivel...
Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, F...
ICCAD
2003
IEEE
221views Hardware» more  ICCAD 2003»
14 years 1 months ago
Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Heterogeneous Distributed Real-time Embedded Systems
Abstract— Dynamic voltage scaling (DVS) is a powerful technique for reducing dynamic power consumption in a computing system. However, as technology feature size continues to sca...
Le Yan, Jiong Luo, Niraj K. Jha
HPCA
2005
IEEE
14 years 4 months ago
On the Limits of Leakage Power Reduction in Caches
If current technology scaling trends hold, leakage power dissipation will soon become the dominant source of power consumption in high performance processors. Caches, due to the f...
Yan Meng, Timothy Sherwood, Ryan Kastner
DAC
2009
ACM
14 years 5 months ago
NoC topology synthesis for supporting shutdown of voltage islands in SoCs
In many Systems on Chips (SoCs), the cores are clustered in to voltage islands. When cores in an island are unused, the entire island can be shutdown to reduce the leakage power c...
Ciprian Seiculescu, Srinivasan Murali, Luca Benini...