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    ASPDAC
    1998
    ACM
    101views Hardware» more  ASPDAC 1998»
    An Integrated Flow for Technology Remapping and Placement of Sub-half-micron Circuits
    13 years 9 months ago
    An Integrated Flow for Technology Remapping and Placement of Sub-half-micron Circuits
    Download  atrak.usc.edu
    ABSTRACT - This paper presents a new design flow, FPDSiMPA, and a set of techniques for synthesizing high-performance sub-half micron logic circuits. FPD-SiMPA consists of logic p...
    Jinan Lou, Amir H. Salek, Massoud Pedram
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    FPGA
    1999
    ACM
    115views FPGA» more  FPGA 1999»
    Using Cluster-Based Logic Blocks and Timing-Driven Packing to Improve FPGA Speed and Density
    13 years 9 months ago
    Using Cluster-Based Logic Blocks and Timing-Driven Packing to Improve FPGA Speed and Density
    Download  www.eecg.toronto.edu
    In this paper, we investigate the speed and area-efficiency of FPGAs employing “logic clusters” containing multiple LUTs and registers as their logic block. We introduce a ne...
    Alexander Marquardt, Vaughn Betz, Jonathan Rose
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