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CHES
2006
Springer
88views Cryptology» more  CHES 2006»
10 years 6 months ago
Dual-Rail Random Switching Logic: A Countermeasure to Reduce Side Channel Leakage
Recent research has shown that cryptographers with glitches are vulnerable in front of Side Channel Attacks (SCA). Since then, several methods, such as Wave Dynamic Differential Lo...
Zhimin Chen, Yujie Zhou
DATE
2010
IEEE
171views Hardware» more  DATE 2010»
10 years 7 months ago
Power consumption of logic circuits in ambipolar carbon nanotube technology
Ambipolar devices have been reported in many technologies, including carbon nanotube field effect transistors (CNTFETs). The ambipolarity can be in-field controlled with a secon...
M. Haykel Ben Jamaa, Kartik Mohanram, Giovanni De ...
DATE
2003
IEEE
89views Hardware» more  DATE 2003»
10 years 8 months ago
Heterogeneous Programmable Logic Block Architectures
In this poster, we propose four new heterogeneous programmable logic blocks (PLBs) consisting of a combination of various sizes of look up tables (LUTs), multiplexers (MUXes), and...
Aneesh Koorapaty, Vikas Chandra, K. Y. Tong, Cheta...
CHES
2005
Springer
80views Cryptology» more  CHES 2005»
10 years 8 months ago
Successfully Attacking Masked AES Hardware Implementations
During the last years, several masking schemes for AES have been proposed to secure hardware implementations against DPA attacks. In order to investigate the effectiveness of thes...
Stefan Mangard, Norbert Pramstaller, Elisabeth Osw...
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