DATE
2009
IEEE
13 years 8 months ago
2009
IEEE
In the digital VLSI cycle, logic transformations are often required to modify the design to meet different synthesis and optimization goals. Logic transformations on sequential ci...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
The ability of logic transformations to enhance safety property checking has been well-established, and many industrial-strength verification solutions accordingly rely ariety of...
ICCAD
2001
IEEE
14 years 1 months ago
2001
IEEE
This paper attempts to determine the capabilities of existing Redundancy Addition and Removal (SRAR) techniques for logic optimization of sequential circuits. To this purpose, we ...