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ECRTS
2008
IEEE
13 years 11 months ago
Predictable Code and Data Paging for Real Time Systems
There is a need for using virtual memory in real-time applications: using virtual addressing provides isolation between concurrent processes; in addition, paging allows the execut...
Damien Hardy, Isabelle Puaut
ACSAC
2008
IEEE
13 years 11 months ago
Defending Against Attacks on Main Memory Persistence
Main memory contains transient information for all resident applications. However, if memory chip contents survives power-off, e.g., via freezing DRAM chips, sensitive data such a...
William Enck, Kevin R. B. Butler, Thomas Richardso...
SSD
2009
Springer
180views Database» more  SSD 2009»
13 years 11 months ago
Indexing Moving Objects Using Short-Lived Throwaway Indexes
With the exponential growth of moving objects data to the Gigabyte range, it has become critical to develop effective techniques for indexing, updating, and querying these massive ...
Jens Dittrich, Lukas Blunschi, Marcos Antonio Vaz ...
ISCA
2009
IEEE
239views Hardware» more  ISCA 2009»
13 years 11 months ago
Scalable high performance main memory system using phase-change memory technology
The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. A...
Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Ju...
IPPS
2009
IEEE
13 years 11 months ago
Optimizing assignment of threads to SPEs on the cell BE processor
The Cell is a heterogeneous multicore processor that has attracted much attention in the HPC community. The bulk of the computational workload on the Cell processor is carried by ...
C. Devi Sudheer, T. Nagaraju, Pallav K. Baruah, As...
DATE
2009
IEEE
135views Hardware» more  DATE 2009»
13 years 11 months ago
System-level hardware-based protection of memories against soft-errors
We present a hardware-based approach to improve the resilience of a computer system against the errors occurred in the main memory with the help of error detecting and correcting ...
Valentin Gherman, Samuel Evain, Mickael Cartron, N...
DAC
2009
ACM
13 years 11 months ago
PDRAM: a hybrid PRAM and DRAM main memory system
In this paper, we propose PDRAM, a novel energy efficient main memory architecture based on phase change random access memory (PRAM) and DRAM. The paper explores the challenges i...
Gaurav Dhiman, Raid Ayoub, Tajana Rosing
ICCD
2005
IEEE
127views Hardware» more  ICCD 2005»
14 years 1 months ago
Using Scratchpad to Exploit Object Locality in Java
Performance of modern computers is tied closely to the effective use of cache because of the continually increasing speed discrepancy between processors and main memory. We demons...
Carl S. Lebsack, J. Morris Chang