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ASYNC
2004
IEEE
78views Hardware» more  ASYNC 2004»
11 years 5 months ago
Hiding Synchronization Delays in a GALS Processor Microarchitecture
We analyze an Alpha 21264-like Globally
Greg Semeraro, David H. Albonesi, Grigorios Magkli...
ASPLOS
2004
ACM
11 years 6 months ago
Formal online methods for voltage/frequency control in multiple clock domain microprocessors
Multiple Clock Domain (MCD) processors are a promising future alternative to today’s fully synchronous designs. Dynamic Voltage and Frequency Scaling (DVFS) in an MCD processor ...
Qiang Wu, Philo Juang, Margaret Martonosi, Douglas...
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