memory bandwidth requirements

11

SIGARCH
2008

94views more SIGARCH 2008»

Optimized on-chip pipelining of memory-intensive computations on the cell BE

13 years 4 months ago

Multiprocessors-on-chip, such as the Cell BE processor, regularly suffer from restricted bandwidth to off-chip main memory. We propose to reduce memory bandwidth requirements, and...

Christoph W. Kessler, Jörg Keller

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7

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NETWORKING
2007

142views Computer Networks» more NETWORKING 2007»

Accelerated Packet Placement Architecture for Parallel Shared Memory Routers

13 years 5 months ago

Download www.ece.utk.edu

Abstract. Parallel shared memory (PSM) routers represent an architectural approach for addressing the high memory bandwidth requirements dictated by output-queued switches. A funda...

Brad Matthews, Itamar Elhanany, Vahid Tabatabaee

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12

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EUROPAR
2008
Springer

112views Distributed And Parallel Com...» more EUROPAR 2008»

Optimized Pipelined Parallel Merge Sort on the Cell BE

13 years 6 months ago

Download pv.fernuni-hagen.de

Chip multiprocessors designed for streaming applications such as Cell BE offer impressive peak performance but suffer from limited bandwidth to offchip main memory. As the number o...

Jörg Keller, Christoph W. Kessler

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