CCR
2004
13 years 4 months ago
2004
IP address lookup is challenging for high performance routers because it requires a longest matching prefix at speeds of up to 10 Gbps (OC-192). Existing solutions have poor updat...
JPDC
2007
13 years 4 months ago
2007
The core of current-generation high-performance multiprocessor systems is out-of-order execution processors with aggressive branch prediction. Despite their relatively high branch...
JPDC
2006
2006
A tight bound on remote reference time complexity of mutual exclusion in the read-modify-write model
13 years 4 months ago
In distributed shared memory multiprocessors, remote memory references generate processor-to-memory traffic, which may result in a bottleneck. It is therefore important to design ...
ASPLOS
1991
ACM
13 years 8 months ago
1991
ACM
Multiprocessor memory reference traces provide a wealth of information on the behavior of parallel programs. We have used this information to explore the relationship between kern...
CC
2006
Springer
13 years 8 months ago
2006
Springer
Abstract. Alias analysis, traditionally performed statically, is unsuited for a dynamic binary translator (DBT) due to incomplete control-flow information and the high complexity o...
PLDI
1994
ACM
13 years 8 months ago
1994
ACM
As microprocessor speeds increase, memory bandwidth is increasing y the performance bottleneck for microprocessors. This has occurred because innovation and technological improvem...
WMPI
2004
ACM
13 years 10 months ago
2004
ACM
High-performance out-of-order processors spend a significant portion of their execution time on the incorrect program path even though they employ aggressive branch prediction al...
PLDI
2004
ACM
13 years 10 months ago
2004
ACM
When vectorizing for SIMD architectures that are commonly employed by today’s multimedia extensions, one of the new challenges that arise is the handling of memory alignment. Pr...
IPPS
2006
IEEE
13 years 10 months ago
2006
IEEE
High-performance multiprocessor systems built around out-of-order processors with aggressive branch predictors execute many memory references that turn out to be on a mispredicted...
CODES
2007
IEEE
13 years 10 months ago
2007
IEEE
There is a strong need now for compilers of embedded systems to find effective ways of optimizing series of loop-nests, wherein majority of the memory references occur in the fo...