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MICRO
1991
IEEE
115views Hardware» more  MICRO 1991»
9 years 26 days ago
Executing Loops on a Fine-Grained MIMD Architecture
- We present techniques for exploiting parallelism extracted from loops on an MIMD system. Parallelism is exploited through parallel execution of instructions on multiple processor...
Sunah Lee, Rajiv Gupta
MICRO
1991
IEEE
126views Hardware» more  MICRO 1991»
9 years 26 days ago
Data Access Microarchitectures for Superscalar Processors with Compiler-Assisted Data Prefetching
The performance of superscalar processors is more sensitive to the memory system delay than their single-issue predecessors. This paper examines alternative data access microarchi...
William Y. Chen, Scott A. Mahlke, Pohua P. Chang, ...
MICRO
1991
IEEE
85views Hardware» more  MICRO 1991»
9 years 26 days ago
Comparing Static and Dynamic Code Scheduling for Multiple-Instruction-Issue Processors
This paper examines two alternative approaches to supporting code scheduling for multiple-instruction-issue processors. One is to provide a set of non-trapping instructions so tha...
Pohua P. Chang, William Y. Chen, Scott A. Mahlke, ...
MICRO
1991
IEEE
93views Hardware» more  MICRO 1991»
9 years 26 days ago
Strategies for Branch Target Buffers
Brian K. Bray, Michael J. Flynn
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