MICRO
1992
IEEE
13 years 8 months ago
1992
IEEE
This paper describes a single chip Multiple Instruction Stream Computer (MISC) capable of extracting instruction level parallelism from a broad spectrum of programs. The MISC arch...
MICRO
1992
IEEE
13 years 8 months ago
1992
IEEE
Software pipelining is an important instruction scheduling technique for efficiently overlapping successive iterations of loops and executing them in parallel. Modulo scheduling i...
MICRO
1992
IEEE
13 years 8 months ago
1992
IEEE
- We present a compilation technique for scheduling parallelism on fine grained asynchronous MIMD systems. The shape scheduling algorithm is introduced that utilizes the flexibilit...
MICRO
1992
IEEE
13 years 8 months ago
1992
IEEE
An important design decision in the implementation of a superscalar processor is the amount of hardware to allocate to the instruction scheduling mechanism. Dynamic scheduling pro...