DATE
1999
IEEE
13 years 8 months ago
1999
IEEE
Modern IC design requires accurate analysis and modeling of chip-level interconnect, the substrate and package parasitics. Traditional approaches for such analyses are computation...
GLVLSI
2006
IEEE
13 years 10 months ago
2006
IEEE
In modern IC design, the number of long on-chip wires has been growing rapidly because of the increasing circuit complexity. Interconnect delay has dominated over gate delay as te...