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MTDT
2002
IEEE
108views Hardware» more  MTDT 2002»
13 years 9 months ago
A Fault Modeling Technique to Test Memory BIST Algorithms
The amount of memory being embedded on chip is growing rapidly. This strongly implies that memory Built-in-self-test (BIST) logic assumes utmost importance amongst all on chip sel...
Raja Venkatesh, Sailesh Kumar, Joji Philip, Sunil ...
MTDT
2002
IEEE
129views Hardware» more  MTDT 2002»
13 years 9 months ago
March SS: A Test for All Static Simple RAM Faults
This paper presents all simple (i.e., not linked) static fault models that have been shown to exist for Random Access Memories (RAMs), and shows that none of the current industria...
Said Hamdioui, A. J. van de Goor, Mike Rodgers