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PDP
2010
IEEE
9 years 8 months ago
Investigation of Transient Fault Effects in an Asynchronous NoC Router
— This paper presents Investigation of Transient Fault Effects in an asynchronous NoC router. The experiment is based on simulation-based fault injection method to assess the fau...
Pooria M. Yaghini, Ashkan Eghbal, Hossein Pedram, ...
ERSA
2006
161views Hardware» more  ERSA 2006»
9 years 11 months ago
A Parametric Study of Scalable Interconnects on FPGAs
Abstract-- With the constantly increasing gate capacity of FPGAs, a single FPGA chip is able to employ large-scale applications. To connect a large number of computational nodes, N...
Daihan Wang, Hiroki Matsutani, Masato Yoshimi, Mic...
CODES
2007
IEEE
10 years 4 months ago
Performance and resource optimization of NoC router architecture for master and slave IP cores
System-on-Chip architectures incorporate several IP cores with well defined master and slave characteristics in terms of on-chip communication. The paper presents a parameterized ...
Glenn Leary, Krishna Mehta, Karam S. Chatha
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