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TODAES
2002
134views more  TODAES 2002»
13 years 4 months ago
False-noise analysis using logic implications
ct Cross-coupled noise analysis has become a critical concern in today's VLSI designs. Typically, noise analysis makes an assumption that all aggressing nets can simultaneousl...
Alexey Glebov, Sergey Gavrilov, David Blaauw, Vlad...
DATE
2004
IEEE
142views Hardware» more  DATE 2004»
13 years 8 months ago
Eliminating False Positives in Crosstalk Noise Analysis
Noise affects circuit operation by increasing gate delays and causing latches to capture incorrect values. Noise analysis techniques can detect some of such noise faults, but accu...
Yajun Ran, Alex Kondratyev, Yosinori Watanabe, Mal...
DAC
1998
ACM
13 years 8 months ago
Buffer Insertion for Noise and Delay Optimization
Interconnect-driven optimization is an increasingly important step in high-performance design. Algorithms for buffer insertion have been successfully utilized to reduce delay in gl...
Charles J. Alpert, Anirudh Devgan, Stephen T. Quay
ISCAS
1999
IEEE
116views Hardware» more  ISCAS 1999»
13 years 8 months ago
Analysis of noise in higher-order translinear filters
Noise analysis of higher-order translinear filters cannot be established through straight-forward extension of analysis techniques for first-order TL filters, due to the presence n...
Michiel H. L. Kouwenhoven, J. Mulder, Wouter A. Se...
DATE
2005
IEEE
100views Hardware» more  DATE 2005»
13 years 10 months ago
Modeling the Non-Linear Behavior of Library Cells for an Accurate Static Noise Analysis
In signal integrity analysis, the joint effect of propagated noise through library cells, and of the noise injected on a quiet net by neighboring switching nets through coupling c...
Cristiano Forzan, Davide Pandini