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    Maurer computers for pipelined instruction processing
    13 years 5 months ago
    Maurer computers for pipelined instruction processing
    Download  alexandria.tue.nl
    We model micro-architectures with non-pipelined instruction processing and pipelined instruction processing, using Maurer machines, basic thread algebra and program algebra. We sho...
    Jan A. Bergstra, C. A. Middelburg
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