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ACSD
2010
IEEE
219views Hardware» more  ACSD 2010»
13 years 2 months ago
The Model Checking View to Clock Gating and Operand Isolation
Abstract--Clock gating and operand isolation are two techniques to reduce the power consumption in state-of-the-art hardware designs. Both approaches basically follow a two-step pr...
Jens Brandt, Klaus Schneider, Sumit Ahuja, Sandeep...
DATE
2000
IEEE
114views Hardware» more  DATE 2000»
13 years 9 months ago
Automating RT-Level Operand Isolation to Minimize Power Consumption in Datapaths
Designs which do not fully utilize their arithmetic datapath components typically exhibit a significant overhead in power consumption. Whenever a module performs an operation who...
Michael Münch, Norbert Wehn, Bernd Wurth, Ren...