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ICCAD
2007
IEEE
87views Hardware» more  ICCAD 2007»
14 years 1 months ago
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
Philip Brisk, Ajay K. Verma, Paolo Ienne
ICFP
2003
ACM
14 years 4 months ago
Iterative-free program analysis
Program analysis is the heart of modern compilers. Most control flow analyses are reduced to the problem of finding a fixed point in a certain transition system, and such fixed po...
Mizuhito Ogawa, Zhenjiang Hu, Isao Sasano