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13
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MEMOCODE
2007
IEEE
177
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Formal Methods
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MEMOCODE 2007
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Combining Multi-Valued Logics in SAT-based ATPG for Path Delay Faults
13 years 10 months ago
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www.informatik.uni-bremen.de
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
Stephan Eggersglüß, Görschwin Fey,...
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