Sciweavers

ASPDAC
2010
ACM
139views Hardware» more  ASPDAC 2010»
13 years 2 months ago
Fixed-outline thermal-aware 3D floorplanning
In this paper, we present a novel algorithm for 3D floorplanning with fixed outline constraints and a particular emphasis on thermal awareness. A computationally efficient thermal ...
Linfu Xiao, Subarna Sinha, Jingyu Xu, Evangeline F...
ASPDAC
2006
ACM
148views Hardware» more  ASPDAC 2006»
13 years 8 months ago
TAPHS: thermal-aware unified physical-level and high-level synthesis
Thermal effects are becoming increasingly important during integrated circuit design. Thermal characteristics influence reliability, power consumption, cooling costs, and performan...
Zhenyu (Peter) Gu, Yonghong Yang, Jia Wang, Robert...
VTS
2006
IEEE
133views Hardware» more  VTS 2006»
13 years 10 months ago
PEAKASO: Peak-Temperature Aware Scan-Vector Optimization
— In this paper, an algorithm for scan vector ordering, PEAKASO, is proposed to minimize the peak temperature during scan testing. Given a circuit with scan and the scan vectors,...
Minsik Cho, David Z. Pan
ISQED
2007
IEEE
127views Hardware» more  ISQED 2007»
13 years 10 months ago
Thermal vs Energy Optimization for DVFS-Enabled Processors in Embedded Systems
— In the past, dynamic voltage and frequency scaling (DVFS) has been widely used for power and energy optimization in embedded system design. As thermal issues become increasingl...
Yongpan Liu, Huazhong Yang, Robert P. Dick, Hui Wa...
DATE
2008
IEEE
130views Hardware» more  DATE 2008»
13 years 10 months ago
Temperature-Aware Scheduling and Assignment for Hard Real-Time Applications on MPSoCs
—Increasing integrated circuit (IC) power densities and temperatures may hamper multiprocessor system-on-chip (MPSoC) use in hard real-time systems. This article formalizes the t...
Thidapat Chantem, Robert P. Dick, Xiaobo Sharon Hu
ICCAD
2006
IEEE
115views Hardware» more  ICCAD 2006»
14 years 1 months ago
Thermal characterization and optimization in platform FPGAs
Increasing power densities in Field Programmable Gate Arrays (FPGAs) have made them susceptible to thermal problems. The advent of platform FPGAs has further exacerbated the probl...
Priya Sundararajan, Aman Gayasen, Narayanan Vijayk...
ICCD
2005
IEEE
97views Hardware» more  ICCD 2005»
14 years 1 months ago
Temperature-Sensitive Loop Parallelization for Chip Multiprocessors
In this paper, we present and evaluate three temperature-sensitive loop parallelization strategies for array-intensive applications executed on chip multiprocessors in order to re...
Sri Hari Krishna Narayanan, Guilin Chen, Mahmut T....