Sciweavers

GLVLSI
2009
IEEE
125views VLSI» more  GLVLSI 2009»
13 years 8 months ago
Spatial and temporal design debug using partial MaxSAT
Design debug remains one of the major bottlenecks in the VLSI design cycle today. Existing automated solutions strive to aid engineers in reducing the debug effort by identifying ...
Yibin Chen, Sean Safarpour, Andreas G. Veneris, Jo...