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ICCAD
2010
IEEE
191views Hardware» more  ICCAD 2010»
8 years 7 days ago
Current Shaping and Multi-thread Activation for Fast and Reliable Power Mode Transition in Multicore Designs
Power gating has been widely adopted in multicore designs. The design of fast and reliable power mode transition for per-core power gating remains a challenging problem. This paper...
Hao Xu Ranga Vemuri Wen-Ben Jone
ICCAD
2008
IEEE
200views Hardware» more  ICCAD 2008»
8 years 7 days ago
Accurate Equivalent Energy Breakeven Time Estimation for Power Gating
Run-time Power Gating (RTPG) is a recent technique, which aims at aggressively reducing leakage power consumption. Energy breakeven time (EBT), or equivalent sleep time has been pr...
Hao Xu, Wen-Ben Jone, Ranga Vemuri

Publication
156views
8 years 7 days ago
Dynamic Virtual Ground Voltage Estimation for Power Gating
With the technology moving into the deep sub-100nm region, the increase of leakage power consumption necessitates more aggressive power reduction techniques. Power gating is a prom...
Hao Xu, Ranga Vemuri, Wen-Ben Jone
ICCAD
2009
IEEE
93views Hardware» more  ICCAD 2009»
8 years 4 months ago
An efficient wakeup scheduling considering resource constraint for sensor-based power gating designs
Power gating has been a very effective way to reduce leakage power. One important design issue for a power gating design is to limit the surge current during the wakeup process. N...
Ming-Chao Lee, Yu-Ting Chen, Yo-Tzu Cheng, Shih-Ch...
ASPDAC
2005
ACM
92views Hardware» more  ASPDAC 2005»
8 years 8 months ago
Sleep transistor sizing using timing criticality and temporal currents
— Power gating is a circuit technique that enables high performance and low power operation. One of the challenges in power gating is sizing the sleep transistor which is used to...
Anand Ramalingam, Bin Zhang, Anirudh Devgan, David...
CAV
2008
Springer
99views Hardware» more  CAV 2008»
8 years 8 months ago
Functional Verification of Power Gated Designs by Compositional Reasoning
Power gating is a technique for low power design in which whole sections of the chip are powered off when they are not needed, and powered back on when they are. Functional correct...
Cindy Eisner, Amir Nahir, Karen Yorav
ASPDAC
2007
ACM
95views Hardware» more  ASPDAC 2007»
8 years 10 months ago
Simultaneous Control of Subthreshold and Gate Leakage Current in Nanometer-Scale CMOS Circuits
Power gating has been widely used to reduce subthreshold leakage. However, its efficiency degrades very fast with technology scaling due to the gate leakage of circuits specific t...
Youngsoo Shin, Sewan Heo, Hyung-Ock Kim, Jung Yun ...
ASPDAC
2006
ACM
140views Hardware» more  ASPDAC 2006»
9 years 13 days ago
Analysis and optimization of gate leakage current of power gating circuits
— Power gating is widely accepted as an efficient way to suppress subthreshold leakage current. Yet, it suffers from gate leakage current, which grows very fast with scaling dow...
Hyung-Ock Kim, Youngsoo Shin
ISLPED
2009
ACM
116views Hardware» more  ISLPED 2009»
9 years 29 days ago
Dynamic power gating with quality guarantees
Power gating is usually driven by a predictive control, and frequent mispredictions can counter-productively lead to a large increase in energy consumption. This energy vulnerabil...
Anita Lungu, Pradip Bose, Alper Buyuktosunoglu, Da...
ASPDAC
2009
ACM
127views Hardware» more  ASPDAC 2009»
9 years 29 days ago
Timing driven power gating in high-level synthesis
- The power gating technique is useful in reducing standby leakage current, but it increases the gate delay. For a functional unit, its maximum allowable delay (for a target clock ...
Shih-Hsu Huang, Chun-Hua Cheng
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