EUC
2006
Springer
13 years 8 months ago
2006
Springer
Abstract. As process technology scales down, power wall starts to hinder improvements in processor performance. Performance optimization has to proceed under a power constraint. Th...
ISCA
2010
IEEE
13 years 10 months ago
2010
IEEE
As CMOS scales beyond the 45nm technology node, leakage concerns are starting to limit microprocessor performance growth. To keep dynamic power constant across process generations...
MICRO
2009
IEEE
13 years 11 months ago
2009
IEEE
Many-core scaling now faces a power wall. The gap between the number of cores that fit on a die and the number that can operate simultaneously under the power budget is rapidly i...