ASPDAC
2007
ACM
13 years 8 months ago
2007
ACM
Parallel prefix adder is the most flexible and widely-used binary adder for ASIC designs. Many high-level synthesis techniques have been developed to find optimal prefix structures...
ASAP
2002
IEEE
13 years 9 months ago
2002
IEEE
This paper introduces PAPA: Packed Arithmetic on a Prefix Adder, a new approach to parallel prefix adder design that supports a wide variety of packed arithmetic computations, inc...