Sciweavers

IPPS
1999
IEEE
13 years 8 months ago
An Efficient VLSI Architecture Parallel Prefix Counting With Domino Logic
We propose an efficient reconfigurable parallel prefix counting network based on the recently-proposed technique of shift switching with domino logic, where the charge/discharge s...
Rong Lin, Koji Nakano, Stephan Olariu, Albert Y. Z...