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HPCA
2011
IEEE
7 years 9 months ago
Mercury: A fast and energy-efficient multi-level cell based Phase Change Memory system
― Phase Change Memory (PCM) is one of the most promising technologies among emerging non-volatile memories. PCM stores data in crystalline and amorphous phases of the GST materia...
Madhura Joshi, Wangyuan Zhang, Tao Li
ICCAD
2009
IEEE
118views Hardware» more  ICCAD 2009»
8 years 3 months ago
Characterizing within-die variation from multiple supply port IDDQ measurements
-- The importance of within-die process variation and its impact on product yield has increased significantly with scaling. Within-die variation is typically monitored by embedding...
Kanak Agarwal, Dhruva Acharyya, Jim Plusquellic
CODES
2010
IEEE
8 years 3 months ago
Statistical approach in a system level methodology to deal with process variation
The impact of process variation in state of the art technology makes traditional (worst case) designs unnecessarily pessimistic, which translates to suboptimal designs in terms of...
Concepción Sanz Pineda, Manuel Prieto, Jos&...
ASPDAC
2005
ACM
104views Hardware» more  ASPDAC 2005»
8 years 7 months ago
Skew scheduling and clock routing for improved tolerance to process variations
The synthesis of clock network in the presence of process variation is becoming a vital design issue towards the performance of digital circuits. In this paper, we propose a clock ...
Ganesh Venkataraman, Cliff C. N. Sze, Jiang Hu
ASPDAC
2008
ACM
200views Hardware» more  ASPDAC 2008»
8 years 7 months ago
Non-Gaussian statistical timing analysis using second-order polynomial fitting
In the nanometer manufacturing region, process variation causes significant uncertainty for circuit performance verification. Statistical static timing analysis (SSTA) is thus dev...
Lerong Cheng, Jinjun Xiong, Lei He
GLVLSI
2009
IEEE
143views VLSI» more  GLVLSI 2009»
8 years 9 months ago
Unified P4 (power-performance-process-parasitic) fast optimization of a Nano-CMOS VCO
In this paper, we present the design of a P4 (Power-PerformanceProcess-Parasitic) aware voltage controlled oscillator (VCO) at nanoCMOS technologies. Through simulations, we have ...
Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos
DATE
2010
IEEE
168views Hardware» more  DATE 2010»
8 years 9 months ago
Formal verification of analog circuits in the presence of noise and process variation
We model and verify analog designs in the presence of noise and process variation using an automated theorem prover, MetiTarski. Due to the statistical nature of noise, we propose ...
Rajeev Narayanan, Behzad Akbarpour, Mohamed H. Zak...
DAC
2000
ACM
8 years 9 months ago
An asymptotically constant, linearly bounded methodology for the statistical simulation of analog circuits including component m
Abstract: This paper presents a new statistical methodology to simulate the effect of both inter-die and intra-die variation on the electrical performance of analog integrated circ...
Carlo Guardiani, Sharad Saxena, Patrick McNamara, ...
VTS
2000
IEEE
114views Hardware» more  VTS 2000»
8 years 9 months ago
Detection of CMOS Defects under Variable Processing Conditions
Transient Signal Analysis is a digital device testing method that is based on the analysis of voltage transients at multiple test points. In this paper, the power supply transient...
Amy Germida, James F. Plusquellic
ISCAS
2003
IEEE
131views Hardware» more  ISCAS 2003»
8 years 10 months ago
Process variation dimension reduction based on SVD
We propose an algorithm based on singular value decomposition (SVD) to reduce the number of process variation variables. With few process variation variables, fault simulation and...
Zhuo Li, Xiang Lu, Weiping Shi
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