ASYNC
2003
IEEE
13 years 9 months ago
2003
IEEE
We present a Sensor-Network Asynchronous Processor (SNAP), which we have designed to be both a processor core for a sensor-network node and a component of a chip multiprocessor, t...
ISCAS
2005
IEEE
13 years 10 months ago
2005
IEEE
Abstract— In this paper, we propose a sub-operation parallelism optimization algorithm in SIMD processor synthesis. Given an initial assembly code and timing constraints, our alg...
FPT
2005
IEEE
13 years 10 months ago
2005
IEEE
SRAM FPGAs are vulnerable to security breaches such as bitstream cloning, reverse-engineering, and tampering. Bitstream encryption and authentication are two most effective and pr...
SUTC
2008
IEEE
13 years 11 months ago
2008
IEEE
As the robotic industry is growing boomingly, the functionalities and system's architecture of robots are more and more complex. The development of robotic application system...
SASP
2008
IEEE
13 years 11 months ago
2008
IEEE
—In this paper we present a method for construction of application specific processor cores from a given C code. Our approach consists of three phases. We start by quantifying t...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
Functional, instruction-based self-testing of microprocessors has recently emerged as an effective alternative or supplement to other testing approaches, and is progressively adop...