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SIGMETRICS
2002
ACM
10 years 11 months ago
Toward reducing processor simulation time via dynamic reduction of microarchitecture complexity
As processor microarchitectures continue to increase in complexity, so does the time required to explore the design space. Performing cycle
Jeanine Cook, Richard L. Oliver, Eric E. Johnson
INFOVIS
1999
IEEE
11 years 4 months ago
Visualizing Application Behavior on Superscalar Processors
The advent of superscalar processors with out-of-order execution makes it increasingly difficult to determine how well an application is utilizing the processor and how to adapt t...
Chris Stolte, Robert Bosch, Pat Hanrahan, Mendel R...
RSP
2000
IEEE
105views Control Systems» more  RSP 2000»
11 years 4 months ago
Processor Models for Retargetable Tools
This paper describes a methodology for developing processor speciļ¬c tools such as assemblers, disassemblers, processor simulators, compilers etc., using processor models in a ge...
Rajat Moona
HPCA
2000
IEEE
11 years 4 months ago
Memory Dependence Speculation Tradeoffs in Centralized, Continuous-Window Superscalar Processors
We consider a variety of dynamic, hardware-based methods for exploiting load/store parallelism, including mechanisms that use memory dependence speculation. While previous work ha...
Andreas Moshovos, Gurindar S. Sohi
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