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SBRN
1998
IEEE
13 years 8 months ago
Implementation of a Probabilistic Neural Network for Multi-spectral Image Classification on an FPGA based Custom Computing Machi
As the demand for higher performance computers for the processing of remote sensing science algorithms increases, the need to investigate new computing paradigms is justified. Fie...
Marco A. Figueiredo, Clay Gloster
IPPS
1999
IEEE
13 years 8 months ago
Solving Satisfiability Problems on FPGAs using Experimental Unit Propagation Heuristic
This paperpresents new resultson anapproach for solvingsatisfiability problems (SAT), that is, creating a logic circuit that is specialized to solve each problem instance on Field ...
Takayuki Suyama, Makoto Yokoo, Akira Nagoya
FPL
2001
Springer
92views Hardware» more  FPL 2001»
13 years 9 months ago
Secure Configuration of Field Programmable Gate Arrays
Although SRAM programmed Field Programmable Gate Arrays (FPGA's) have come to dominate the industry due to their density and performance advantages over non-volatile technolog...
Tom Kean
FPL
2001
Springer
142views Hardware» more  FPL 2001»
13 years 9 months ago
Gigahertz Reconfigurable Computing Using SiGe HBT BiCMOS FPGAs
Field programmable gate arrays (FPGAs) are flexible programmable devices that are used in a wide variety of applications such as network routing, signal processing, pattern recogni...
Bryan S. Goda, Russell P. Kraft, Steven R. Carloug...
CHES
2001
Springer
191views Cryptology» more  CHES 2001»
13 years 9 months ago
A Scalable GF(p) Elliptic Curve Processor Architecture for Programmable Hardware
Abstract. This work proposes a new elliptic curve processor architecture for the computation of point multiplication for curves defined over fields GF(p). This is a scalable arch...
Gerardo Orlando, Christof Paar
ARC
2009
Springer
134views Hardware» more  ARC 2009»
13 years 9 months ago
A HyperTransport 3 Physical Layer Interface for FPGAs
Abstract. This paper presents the very first implementation of a HyperTransport 3 physical layer interface for Field Programmable Gate Arrays. HyperTransport is a low latency, high...
Heiner Litz, Holger Fröning, Ulrich Brün...
FPL
2003
Springer
115views Hardware» more  FPL 2003»
13 years 9 months ago
Programmable Asynchronous Pipeline Arrays
We discuss high-performance programmable asynchronous pipeline arrays (PAPAs). These pipeline arrays are coarse-grain field programmable gate arrays (FPGAs) that realize high data...
John Teifel, Rajit Manohar
FPL
2003
Springer
114views Hardware» more  FPL 2003»
13 years 9 months ago
Power Analysis of FPGAs: How Practical is the Attack?
Recent developments in information technologies made the secure transmission of digital data a critical design point. Large data flows have to be exchanged securely and involve en...
François-Xavier Standaert, Loïc van Ol...
ISCAS
2003
IEEE
112views Hardware» more  ISCAS 2003»
13 years 9 months ago
Architectures for function evaluation on FPGAs
This paper presents a new family of architectures for multi-cycle area-efficient evaluation of elementary and composite functions, and an exploration of the design tradeoffs for i...
Nalin Sidahao, George A. Constantinides, Peter Y. ...
IOLTS
2003
IEEE
124views Hardware» more  IOLTS 2003»
13 years 9 months ago
Designing FPGA based Self-Testing Checkers for m-out-of-n Codes
The paper describes a specific method for designing selfchecking checkers for m-out-of-n codes. The method is oriented to the Field Programmable Gate Arrays technology and is base...
A. Matrosova, Vladimir Ostrovsky, Ilya Levin, K. N...