Sciweavers

IPPS
2006
IEEE
13 years 10 months ago
Parallel FPGA-based all-pairs shortest-paths in a directed graph
With rapid advances in VLSI technology, Field Programmable Gate Arrays (FPGAs) are receiving the attention of the Parallel and High Performance Computing community. In this paper,...
Uday Bondhugula, Ananth Devulapalli, Joseph Fernan...
IJCNN
2006
IEEE
13 years 10 months ago
A Scalable FPGA Implementation of Cellular Neural Networks for Gabor-type Filtering
— We describe an implementation of Gabor-type filters on field programmable gate arrays using the cellular neural network (CNN) architecture. The CNN template depends upon the ...
Ocean Y. H. Cheung, Philip Heng Wai Leong, Eric K....
ICRA
2006
IEEE
158views Robotics» more  ICRA 2006»
13 years 10 months ago
An Agent-based Mobile Robot System using Configurable SOC Technique
– To make a mobile robot with real-time vision system adapt to the highly dynamic environments and emergencies under the real-time constraints, a significant account of processin...
Yan Meng
FPL
2007
Springer
115views Hardware» more  FPL 2007»
13 years 10 months ago
Hardware/Software Process Migration and RTL Simulation
This paper describes an execution cache that uses process migration between hardware and software contexts by way of run-time reconfiguration (RTR) of Field Programmable Gate Arr...
Aric D. Blumer, Cameron D. Patterson
IJCNN
2007
IEEE
13 years 10 months ago
A Hardware-friendly Support Vector Machine for Embedded Automotive Applications
— We present here a hardware–friendly version of the Support Vector Machine (SVM), which is useful to implement its feed–forward phase on limited–resources devices such as ...
Davide Anguita, Alessandro Ghio, Stefano Pischiutt...
IJCNN
2008
IEEE
13 years 11 months ago
Using Variable Neighborhood Search to improve the Support Vector Machine performance in embedded automotive applications
— In this work we show that a metaheuristic, the Variable Neighborhood Search (VNS), can be effectively used in order to improve the performance of the hardware–friendly versio...
Enrique Alba, Davide Anguita, Alessandro Ghio, San...
FPGA
2009
ACM
183views FPGA» more  FPGA 2009»
13 years 11 months ago
HW/SW methodologies for synchronization in FPGA multiprocessors
Modern Field Programmable Gate Arrays (FPGA) can be programmed with multiple soft-core processors. These solutions can be used for MultiProcessor Systems-on-Chip (MPSoCs) prototyp...
Antonino Tumeo, Christian Pilato, Gianluca Palermo...
FPGA
2009
ACM
183views FPGA» more  FPGA 2009»
13 years 11 months ago
A comparison of via-programmable gate array logic cell circuits
Via-programmable gate arrays (VPGAs) offer a middle ground between application specific integrated circuits and field programmable gate arrays in terms of flexibility, manufac...
Thomas C. P. Chau, Philip Heng Wai Leong, Sam M. H...
DAC
2006
ACM
14 years 5 months ago
FLAW: FPGA lifetime awareness
Aggressive scaling of technology has an adverse impact on the reliability of VLSI circuits. Apart from increasing transient error susceptibility, the circuits also become more vul...
Suresh Srinivasan, Prasanth Mangalagiri, Yuan Xie,...
DAC
2002
ACM
14 years 5 months ago
Exploiting operation level parallelism through dynamically reconfigurable datapaths
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...
Zhining Huang, Sharad Malik