Sciweavers

ET
2000
80views more  ET 2000»
13 years 4 months ago
A New Method for Testing Re-Programmable PLAs
: We present a method for obtaining a minimal set of test configurations and their associated set oftest patterns that completely tests re-programmable Programmable Logic Arrays (P...
Charles E. Stroud, James R. Bailey, Johan R. Emmer...
FTEDA
2007
156views more  FTEDA 2007»
13 years 4 months ago
FPGA Architecture: Survey and Challenges
Field-Programmable Gate Arrays (FPGAs) have become one of the key digital circuit implementation media over the last decade. A crucial part of their creation lies in their archite...
Ian Kuon, Russell Tessier, Jonathan Rose
FPL
2000
Springer
130views Hardware» more  FPL 2000»
13 years 8 months ago
Area-Optimized Technology Mapping for Hybrid FPGAs
As integration levels in FPGA devices have increased over the past decade, the structure of programmable logic resources has become more diversified. Recently, Altera Corporation h...
Srini Krishnamoorthy, Sriram Swaminathan, Russell ...
FPL
2000
Springer
95views Hardware» more  FPL 2000»
13 years 8 months ago
It's FPL, Jim - But Not as We Know It! Opportunities for the New Commercial Architectures
Following the simple Programmable Logic Device (SPLD) and Field Programmable Gate Array (FPGA) generations a third generation of programmable logic technologies is now reaching the...
Tom Kean
FPL
1999
Springer
95views Hardware» more  FPL 1999»
13 years 8 months ago
FPGA Viruses
Programmable logic is widely used, for applications ranging from eld-upgradable subsystems to advanced uses such as recon gurable computing platforms which are modi able at run-tim...
Ilija Hadzic, Sanjay Udani, Jonathan M. Smith
FPGA
2001
ACM
137views FPGA» more  FPGA 2001»
13 years 8 months ago
Detailed routing architectures for embedded programmable logic IP cores
As the complexity of integrated circuits increases, the ability to make post-fabrication changes to fixed ASIC chips will become more and more attractive. This ability can be real...
Peter Hallschmid, Steven J. E. Wilton
EMSOFT
2001
Springer
13 years 8 months ago
Compiler Optimizations for Adaptive EPIC Processors
Abstract. Advances in VLSI technology have lead to a tremendous increase in the density and number of devices that can be manufactured in a single microchip. One of the interesting...
Krishna V. Palem, Surendranath Talla, Weng-Fai Won...
ITC
2003
IEEE
149views Hardware» more  ITC 2003»
13 years 9 months ago
BIST for Xilinx 4000 and Spartan Series FPGAs: A Case Study
Abstract: We discuss the development of Built-In SelfTest (BIST) configurations that test all of the programmable logic and interconnect resources in the core of Xilinx 4000E, 4000...
Charles E. Stroud, Keshia N. Leach, Thomas A. Slau...
FPL
2005
Springer
111views Hardware» more  FPL 2005»
13 years 9 months ago
Mutable Codesign for Embedded Protocol Processing
This paper addresses exploitation of the capabilities of platform FPGAs to implement embedded networking for systems on chip. In particular, a methodology for exploring trade-offs...
Todd S. Sproull, Gordon J. Brebner, Christopher E....
FPL
2005
Springer
97views Hardware» more  FPL 2005»
13 years 9 months ago
Safe PLD-based Programmable Controllers
In many industrial processes, an incorrect operation can lead to irreparable damage to people, equipment, or the environment. In order to reduce risks, the electronic control syst...
Jacobo Alvarez, Jorge Marcos, Santiago Fernandez