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DAC
2008
ACM
13 years 6 months ago
Programmable logic circuits based on ambipolar CNFET
Recently, it was demonstrated that the polarity of carbon nanotube field effect transistors can be electrically controlled. In this paper we show how Programmable Logic Arrays (PL...
M. Haykel Ben Jamaa, David Atienza, Yusuf Leblebic...
ISMVL
1999
IEEE
76views Hardware» more  ISMVL 1999»
13 years 8 months ago
Multiple-Valued Minimization to Optimize PLAs with Output EXOR Gates
This paper considers an optimization method of programmable logic arrays (PLAs), which have two-input EXOR gate at the outputs. The PLA realizes an EXOR of two sum-of-products exp...
Debatosh Debnath, Tsutomu Sasao
FPGA
2005
ACM
156views FPGA» more  FPGA 2005»
13 years 10 months ago
Design of programmable interconnect for sublithographic programmable logic arrays
Sublithographic Programmable Logic Arrays can be interconnected and restored using nanoscale wires. Building on a hybrid of bottom-up assembly techniques supported by conventional...
André DeHon
DSD
2006
IEEE
113views Hardware» more  DSD 2006»
13 years 10 months ago
An Asynchronous PLA with Improved Security Characteristics
Programmable logic arrays (PLAs) present an alternative to logic-gate based design. We propose the transistor level structure of a PLA for single-rail asynchronous applications. T...
Petros Oikonomakos, Simon W. Moore