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MJ
2006
145views more  MJ 2006»
13 years 4 months ago
A design flow for speeding-up dsp applications in heterogeneous reconfigurable systems
In this paper, we propose a method for speeding-up Digital Signal Processing applications by partitioning them between the reconfigurable hardware blocks of different granularity ...
Michalis D. Galanis, Athanasios Milidonis, Athanas...
ISCAS
2005
IEEE
125views Hardware» more  ISCAS 2005»
13 years 10 months ago
A methodology for partitioning DSP applications in hybrid reconfigurable systems
—In this paper, we describe an automated and formalized methodology for partitioning computational intensive applications between reconfigurable hardware blocks of different gran...
Michalis D. Galanis, Athanasios Milidonis, George ...
IPPS
2005
IEEE
13 years 10 months ago
A Framework for Partitioning Computational Intensive Applications in Hybrid Reconfigurable Platforms
In this paper, we describe a prototype software framework that implements a formalized methodology for partitioning computational intensive applications between reconfigurable har...
Michalis D. Galanis, Athanasios Milidonis, George ...
FCCM
2005
IEEE
151views VLSI» more  FCCM 2005»
13 years 10 months ago
Accelerating Applications by Mapping Critical Kernels on Coarse-Grain Reconfigurable Hardware in Hybrid Systems
In this paper, we propose a method for speeding-up applications by partitioning them between the reconfigurable hardware blocks of different granularity and mapping critical parts...
Michalis D. Galanis, Grigoris Dimitroulakos, Costa...