Sciweavers

Share
IJES
2007
79views more  IJES 2007»
9 years 1 months ago
Energy-aware compilation and hardware design for VLIW embedded systems
Abstract: Tomorrow’s embedded devices need to run high-resolution multimedia applications which need an enormous computational complexity with a very low energy consumption const...
José L. Ayala, Marisa López-Vallejo,...
CASES
2005
ACM
9 years 3 months ago
Exploiting pipelining to relax register-file port constraints of instruction-set extensions
Customisable embedded processors are becoming available on the market, thus making it possible for designers to speed up execution of applications by using Application-specific F...
Laura Pozzi, Paolo Ienne
ISLPED
1997
ACM
116views Hardware» more  ISLPED 1997»
9 years 5 months ago
Power reduction techniques for a spread spectrum based correlator
This paper presents the design of a low power spread spectrum correlator. We look at two major approaches and evaluate the best alternative for power reduction. We first consider...
David Garrett, Mircea R. Stan
ISLPED
1998
ACM
86views Hardware» more  ISLPED 1998»
9 years 5 months ago
The energy complexity of register files
Register files (RF) represent a substantial portion of the energy budget in modern processors, and are growing rapidly with the trend towards wider instruction issue. The actual ...
Victor V. Zyuban, Peter M. Kogge
MICRO
2002
IEEE
104views Hardware» more  MICRO 2002»
9 years 6 months ago
Reducing register ports for higher speed and lower energy
The key issues for register file design in high-performance processors are access time and energy. While previous work has focused on reducing the number of registers, we propose...
Il Park, Michael D. Powell, T. N. Vijaykumar
GLVLSI
2010
IEEE
136views VLSI» more  GLVLSI 2010»
9 years 6 months ago
Thermal-aware compilation for system-on-chip processing architectures
The development of compiler-based mechanisms to reduce the percentage of hotspots and optimize the thermal profile of large register files has become an important issue. Thermal...
Mohamed M. Sabry, José L. Ayala, David Atie...
ISCA
2003
IEEE
124views Hardware» more  ISCA 2003»
9 years 6 months ago
Banked Multiported Register Files for High-Frequency Superscalar Microprocessors
Multiported register files are a critical component of high-performance superscalar microprocessors. Conventional multiported structures can consume significant power and die ar...
Jessica H. Tseng, Krste Asanovic
ASAP
2003
IEEE
107views Hardware» more  ASAP 2003»
9 years 6 months ago
Energy Aware Register File Implementation through Instruction Predecode
The register file is a power-hungry device in modern architectures. Current research on compiler technology and computer architectures encourages the implementation of larger dev...
José L. Ayala, Marisa Luisa López-Va...
PACS
2004
Springer
146views Hardware» more  PACS 2004»
9 years 6 months ago
An Optimized Front-End Physical Register File with Banking and Writeback Filtering
In recent years, processor manufacturers have converged on two types of register file architectures. Both IBM with its POWER series and Intel with its Pentium series are using a ...
Miquel Pericàs, Rubén Gonzále...
CF
2004
ACM
9 years 6 months ago
Integrated temporal and spatial scheduling for extended operand clustered VLIW processors
Centralized register file architectures scale poorly in terms of clock rate, chip area, and power consumption and are thus not suitable for consumer electronic devices. The conse...
Rahul Nagpal, Y. N. Srikant
books