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WCE
2007
9 years 10 months ago
A Graph-based Framework for High-level Test Synthesis
Improving testability during the early stages of High-level synthesis has several advantages including reduced test hardware overhead and design iterations. Recently, BIST techniq...
Ali Pourghaffari bashari, Saadat Pourmozafari
ISSS
1995
IEEE
100views Hardware» more  ISSS 1995»
10 years 1 months ago
Optimal code generation for embedded memory non-homogeneous register architectures
This paper examines the problem of code-generation for expression trees on non-homogeneous register set architectures. It proposes and proves the optimality of an O(n) algorithm f...
Guido Araujo, Sharad Malik
FOSSACS
2006
Springer
10 years 1 months ago
Register Allocation After Classical SSA Elimination is NP-Complete
Chaitin proved that register allocation is equivalent to graph coloring and hence NP-complete. Recently, Bouchez, Brisk, and Hack have proved independently that the interference gr...
Fernando Magno Quintão Pereira, Jens Palsbe...
CC
2006
Springer
101views System Software» more  CC 2006»
10 years 1 months ago
SARA: Combining Stack Allocation and Register Allocation
Commonly-used memory units enable a processor to load and store multiple registers in one instruction. We showed in 2003 how to extend gcc with a stack-location-allocation (SLA) ph...
V. Krishna Nandivada, Jens Palsberg
CC
2006
Springer
132views System Software» more  CC 2006»
10 years 1 months ago
Register Allocation for Programs in SSA-Form
As register allocation is one of the most important phases in optimizing compilers, much work has been done to improve its quality and speed. We present a novel register allocation...
Sebastian Hack, Daniel Grund, Gerhard Goos
DATE
2004
IEEE
175views Hardware» more  DATE 2004»
10 years 1 months ago
Breaking Instance-Independent Symmetries in Exact Graph Coloring
Code optimization and high level synthesis can be posed as constraint satisfaction and optimization problems, such as graph coloring used in register allocation. Graph coloring is...
Arathi Ramani, Fadi A. Aloul, Igor L. Markov, Kare...
APLAS
2006
ACM
10 years 1 months ago
Combining Offline and Online Optimizations: Register Allocation and Method Inlining
Abstract. Fast dynamic compilers trade code quality for short compilation time in order to balance application performance and startup time. This paper investigates the interplay o...
Hiroshi Yamauchi, Jan Vitek
PLDI
1998
ACM
10 years 1 months ago
Quality and Speed in Linear-scan Register Allocation
A linear-scan algorithm directs the global allocation of register candidates to registers based on a simple linear sweep over the program being compiled. This approach to register...
Omri Traub, Glenn H. Holloway, Michael D. Smith
MICRO
1998
IEEE
111views Hardware» more  MICRO 1998»
10 years 1 months ago
Precise Register Allocation for Irregular Architectures
This paper proposes a precise approach to register allocation for irregular-register architectures which is based on 0-1 integer programming (IP). Prior work shows that IP registe...
Timothy Kong, Kent D. Wilken
ISCAS
1999
IEEE
66views Hardware» more  ISCAS 1999»
10 years 1 months ago
Low energy register allocation beyond basic blocks
An approach of doing register allocation beyond basic blocks for low energy is presented in this paper. With careful analysis of boundary conditions between consecutive blocks, ou...
Yumin Zhang, Xiaobo Hu, Danny Z. Chen
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