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TVLSI
2010
9 years 1 months ago
Resource Based Optimization for Simultaneous Shield and Repeater Insertion
A new approach for resource based optimization for high performance integrated circuits is presented. The methodology is applied to simultaneous shield and repeater insertion, resu...
Renatas Jakushokas, Eby G. Friedman
DAC
2004
ACM
9 years 10 months ago
Practical repeater insertion for low power: what repeater library do we need?
In this paper, we investigate the problem of repeater insertion for low power under a given timing budget. We propose a novel repeater insertion algorithm to compute the optimal r...
Xun Liu, Yuantao Peng, Marios C. Papaefthymiou
VLSID
1999
IEEE
104views VLSI» more  VLSID 1999»
9 years 11 months ago
Interconnect Optimization Strategies for High-Performance VLSI Designs
Interconnect tuning and repeater insertion are necessary to optimize interconnectdelay, signalperformanceandintegrity, andinterconnectmanufacturability and reliability. Repeater i...
Andrew B. Kahng, Sudhakar Muddu, Egino Sarto
ICCAD
1999
IEEE
87views Hardware» more  ICCAD 1999»
9 years 11 months ago
Repeater insertion in tree structured inductive interconnect
Yehea I. Ismail, Eby G. Friedman, José Luis...
DATE
2002
IEEE
69views Hardware» more  DATE 2002»
9 years 12 months ago
Flip-Flop and Repeater Insertion for Early Interconnect Planning
We present a unified framework that considers flipflop and repeater insertion and the placement of flipflop/repeater blocks during RT or higher level design. We introduce the...
Ruibing Lu, Guoan Zhong, Cheng-Kok Koh, Kai-Yuan C...
ISLPED
2005
ACM
99views Hardware» more  ISLPED 2005»
10 years 16 days ago
A low-power bus design using joint repeater insertion and coding
In this paper, we propose joint repeater insertion and crosstalk avoidance coding as a low-power alternative to repeater insertion for global bus design in nanometer technologies....
Srinivasa R. Sridhara, Naresh R. Shanbhag
ISLPED
2005
ACM
96views Hardware» more  ISLPED 2005»
10 years 16 days ago
Power-optimal repeater insertion considering Vdd and Vth as design freedoms
This work first presents an analytical repeater insertion method which optimizes power under delay constraint for a single net. This method finds the optimal repeater insertion ...
Yu Ching Chang, King Ho Tam, Lei He
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