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    DAC
    1999
    ACM
    147views Computer Architecture» more  DAC 1999»
    Noise-Aware Repeater Insertion and Wire-Sizing for On-Chip Interconnect Using Hierarchical Moment-Matching
    14 years 5 months ago
    Noise-Aware Repeater Insertion and Wire-Sizing for On-Chip Interconnect Using Hierarchical Moment-Matching
    Download  vlsi.ece.wisc.edu
    Recently, several algorithms for interconnect optimization via repeater insertion and wire sizing have appeared based on the Elmore delay model. Using the Devgan noise metric [6] ...
    Chung-Ping Chen, Noel Menezes
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