Sciweavers

ARCS
1997
Springer
13 years 8 months ago
A RISC Processor with Extended Forwarding
The paper examines a simple conceptual modification of the operation unit of a RISC processor. We propose to substitute a part of the conventional general purpose register file by...
Gert Markwardt, Günter Kemnitz, Rainer G. Spa...
DATE
2003
IEEE
108views Hardware» more  DATE 2003»
13 years 9 months ago
HW/SW Partitioned Optimization and VLSI-FPGA Implementation of the MPEG-2 Video Decoder
In this paper, we propose an optimized real-time MPEG-2 video decoder. The decoder has been implemented in one FPGA device as a HW/SW partitioned system. We made time/power-consum...
Matjaz Verderber, Andrej Zemva, Damjan Lampret
DATE
2005
IEEE
129views Hardware» more  DATE 2005»
13 years 10 months ago
Hardware Support for Arbitrarily Complex Loop Structures in Embedded Applications
In this paper, the program control unit of an embedded RISC processor is enhanced with a novel zerooverhead loop controller (ZOLC) supporting arbitrary loop structures with multip...
Nikolaos Kavvadias, Spiridon Nikolaidis
DAC
1998
ACM
14 years 5 months ago
A Video Signal Processor for MIMD Multiprocessing
The video signal processor AxPe1280V has been developed for implementation of different video coding applications according to standards like ITU-T H.261/H.263, and ISO MPEG-1/2. ...
Dirk Niggemeyer, Jörg Hilgenstock, Jan Otters...